United Kingdom

Reading, UK - 19 November 2013

AGENDA

8.30 Arrival: Refreshments and Networking
9.15 Introduction:  Mike Bartley, Test and Verification Solutions Ltd
9.20 Mentor Graphics, Mark Olen
10.00 Panel Session: Challenge Papers – Our Top Verification Challenges

10.40 Doulos, John Aynsley
11.00 Refreshments and Networking
11.30 User Presentations

12.45 Lunch and Networking 
13.45 Cadence Design Systems, JL Gray
14.25 Synopsys, Bindesh Patel
14.55 Jasper Design Automation, Oz Levia
15.15 OneSpin Solutions, Sergio Marchese
15.35 Refreshments and Networking
16.00 Real Intent, Robert Eichner
16.20 Panel Session: The EDA Response(Cadence, Mentor, Doulos, Jasper, OneSpin and Synopsys)
17.00 Meet the sponsors in the Exhibition Area
17.30 EDA Prize Draw
17.45 End of Conference

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